achieve up to 80 lower power than fpgas
eASIC  Nextreme  90nm NEW ASICs
High Volume Applications
Up to 5M Gates (350K Logic Cells) and up to 5.6Mb of bRAM.
Ideal for High Volume Applications
eASIC  Nextreme-2  45nm NEW ASICs
High Density Applications
Up to 20M Gates (1.9M Logic Cells) and up to 30Mb of bRAM.
Ideal for High Density Applications
Reducing FPGA Cost
  • FPGA designers looking to reduce device cost or cost per channel frequently use eASIC devices as a lower cost and risk path versus standard cell ASIC.
Reducing FPGA Power Consumption
  • FPGA designers looking to reduce device power consumption or power per channel frequently use eASIC devices as a lower risk path to standard cell ASIC. eASIC devices enable up to 80% reduction in power consumption.
What's New

Testimonials

    Fujitsu Advanced Technologies Ltd is pleased to see that eASIC is delivering a 45nm product. This New ASIC is able to deliver the right combination of performance, power and price combined with low up-front cost. We find the power reduction especially important as we look to add more functionality to our world-class ICT infrastructure products.

    Akira Itoh, Fujitsu Advanced Technologies Ltd