Monday, 10 November, 2008
New Intellectual Property (IP) Blocks Reduce Cost and Accelerate Time to Market for eASIC Nextreme NEW ASICs
Santa Clara, CA – November 10, 2008 – eASIC Corporation, a provider of zero-mask charge ASIC devices, and Video-Cores, a provider of high-performance media IP cores, today announced the immediately availability of proven video IP cores for eASIC’s low-cost eASIC Nextreme ASICs. The combination of eASIC’s technology and Video-Cores’ Core Values® video IP provides video system designers with a quick path to implementing custom functions such as video scalers, color-space converters and ITU 656 interfaces. Read the rest of this entry »
Thursday, 31 July, 2008
MPEG-4 Reference Design Leverages Ominvision’s OV7725 and eASIC’s eDV9100 CODEC to Provide Rapid Development of Consumer Camera Solutions
SUNNYVALE, Calif. – July 31, 2008 – OmniVision Technologies, Inc. (NASDAQ: OVTI), a leading independent supplier of CMOS CameraChip™ image sensors and eASIC Corporation, the leading provider of zero mask-charge ASIC devices, today announced the availability of the eDVR91, an MPEG-4 camera reference design suitable for a broad range of applications including camcorders, security and surveillance cameras and automotive vision systems. Read the rest of this entry »
Thursday, 17 July, 2008
Configurable Architecture Permits Rapid Deployment of Audio and Video CODEC ICs Supporting MPEG-4, JPEG and H.264 Standards
Santa Clara, CA – July 17, 2008 – eASIC Corporation (www.eASIC.com), a provider of zero mask-charge ASIC devices, today announced the immediate availability of the eDV9100, the first member of it’s eDiVeo family of low-cost single chip audio and video CODECS. The eDV9100 supports MPEG-4 video providing encoding or decoding for full motion VGA. The versatile eDV9100 is ideal for System OEMs, ODMs and Application Specific Standard Product designers that want to rapidly introduce a wide variety of video solutions such as low cost digital camcorders, wearable and portable video surveillance, taxi-cameras, rear-view automotive cameras, and hands free cameras. The eDV9100 is the first device in eASIC’s eDiVeo portfolio, which will also include high-definition H.264 devices. Read the rest of this entry »
Tuesday, 8 July, 2008
eASIC’s Zero Mask-charge ASIC Devices Enable Nexus Chips to Increase Performance by 2X and Reduce FPGA Power Consumption by 80% for 3D Video Applications
Santa Clara, CA – July 8, 2008- eASIC Corporation, a provider of zero mask-charge ASIC devices, today announced that Nexus Chips, a leading Korean provider of graphics acceleration solutions, has leveraged eASIC’s Nextreme zero mask-charge ASIC in its latest 3D graphics acceleration system. By using eASIC Nextreme, Nexus Chips was able to obtain twice the performance while reducing power consumption by 80% compared to the FPGA that was previously being used. Read the rest of this entry »
Monday, 30 June, 2008
eASIC Based DDR2 SDRAM Solution Provides 60% Higher Performance than Mainstream Low-Density FPGAs
Santa Clara, CA – June 30, 2008 – eASIC Corporation, a provider of zero-mask charge ASIC devices, and Northwest Logic, a provider of high-performance IP Cores, today announced the immediately availability of a silicon-proven 533 Mbps DDR2 SDRAM solution for eASIC’s low-cost Nextreme family of devices. The combination of eASIC’s Nextreme and Northwest Logic’s DDR2 SDRAM Memory Interface Solution provides 60% higher performance than mainstream low-density FPGAs, which are typically limited to 333 Mbps or less performance. The solution utilizes Northwest Logic’s high-performance DDR2 SDRAM Controller Core and eASIC-specific DDR PHY to provide an easy-to-use, one-stop-shop solution for eASIC’s Nextreme devices. Read the rest of this entry »
Monday, 2 June, 2008
eASIC Zooms Past 100th 90nm ASIC Design Win in 18 Months
Santa Clara, CA -2 June, 2008 – eASIC Corporation, a provider of zero mask-charge ASIC devices, today announced that it has surpassed 100 design wins in only 18 months for it’s eASIC Nextreme family of 90nm ASIC devices. These design wins demonstrate rapid adoption into both mature and emerging markets including digital consumer, telecommunication infrastructure, wireless, medical, video surveillance and broadcast. eASIC’s Nextreme family of zero mask-charge and no minimum order ASIC devices, combines the low cost benefits of traditional ASIC devices with a rapid design cycle and only a four week silicon turnaround time. Read the rest of this entry »
Tuesday, 27 May, 2008
New Senior Vice President to Lead Advanced Technology Development of Zero Mask-charge ASICs.
Santa Clara, CA – May 27, 2008 – eASIC Corporation, a provider of zero mask-charge ASIC devices, today announced it has appointed Dr. Ranko Scepanovic as Senior Vice President of Advanced Technology. Dr. Scepanovic will lead the companies Advanced Technology Group and report directly to Ronnie Vasishta, eASIC President and CEO. Read the rest of this entry »
Monday, 28 April, 2008
The Challenge Objective Is To Excite and Stimulate Innovation. A total of $30,000 offered to the winning entries.
Santa Clara, CA – April 28, 2008 – eASIC Corporation, a provider of zero-mask charge ASIC devices, today announced a $30,000 placement design challenge. This challenge is designed to inspire innovation in the area of placement algorithms. eASIC will offer a total prize of $30,000 to the individuals or groups that can implement the most efficient placement algorithms. Read the rest of this entry »
Monday, 14 April, 2008
Gaisler Research Joins eASIC’s Growing eZ-IP Alliance Program to Provide Higher Performance LEON3 SPARC Soft Processor using eASIC Nextreme Zero Mask-Charge ASICs
Santa Clara, CA – April 14, 2008 – eASIC Corporation, a provider of zero-mask charge ASIC devices, today announced the immediate availability of Gaisler Research’s LEON3 SPARC Soft Processor. eASIC and Gaisler Research migrated the LEON3 processor to eASIC’s Nextreme family of zero mask-charge ASIC devices and achieved 235MHz performance, shattering the performance achievable using high performance FPGAs. Customers now have immediate access to the LEON3 processor and GRLIB IP library for implementing single chip, SPARC V8 architecture compliant, embedded systems using eASIC Nextreme devices. Read the rest of this entry »
Thursday, 10 April, 2008
eASIC Attracts New Vice President to Lead Software Development for Next Generation Silicon Products
Santa Clara, CA – April 10, 2008 – eASIC Corporation, a provider of zero mask-charge ASIC devices, today announced it has appointed Mo Movahed as Vice President of Software Engineering. Movahed will spearhead the development of design tools and methodologies for eASIC’s current and next generation silicon products enabling customers to further increase the number of designs per engineer per year. Movahed will report directly to Ronnie Vasishta, eASIC President and CEO. Read the rest of this entry »
Tuesday, 25 March, 2008
eASIC’s Zero Mask-Charge ASIC Delivers Increased Functionality at Significantly Lower Cost than a Low Density FPGA
Santa Clara, CA – March 25, 2008 – eASIC Corporation, a provider of zero-mask charge ASIC devices, today announced that AVTECH, a leading Taiwanese manufacturer of low cost surveillance systems, reduced the system cost of its new dome IP surveillance camera by 45%. This was achieved by replacing a low density FPGA with eASIC’s zero-mask charge eASIC Nextreme ASIC. The eASIC Nextreme device consolidated multiple high-performance image processing functions and enabled AVTECH to increase the camera features while significantly reducing overall system cost and power consumption. Read the rest of this entry »
Tuesday, 18 March, 2008
First Phase of Program Enables Cost Reduction of Low Density FPGAs
Santa Clara, California, March 18, 2008 – eASIC Corporation, a provider of zero-mask charge ASIC devices, today announced the first phase of a worldwide program that is aimed at ushering in a new era of affordable silicon customization. The first step in this far-reaching program is to assist companies that are hampered by high FPGA unit costs to set more aggressive market pricing for their end products. The initial targets of this FPGA cost reduction program are the low density FPGAs that are primarily used in consumer and multimedia applications. Read the rest of this entry »
Thursday, 13 March, 2008
eASIC Raises Largest Round To Date To Fund Product Deployment, Customer Support and Next Generation Product Release
Santa Clara, California (March 13, 2008)–eASIC Corporation, a provider of zero mask-charge ASIC chips, today announced it has raised $48M in late stage financing. The financing round was lead by Advanced Equities Incorporated. Also participating in the round were previous investors Khosla Ventures, Kleiner Perkins Caufield and Byers, Crescendo Ventures and Evergreen Venture Partners. The eASIC Chief Financial Officer, Craig Klosterman, also invested in this round. Read the rest of this entry »
