eASIC nextreme




AES128 Encryption/Decryption

AES128 Encryption/Decryption



  • Implemented according to the FIPS 197 documentation
  • Key size of 128, 192 and 256 bits
  • Both encryption and decryption supported
  • Fully synchronous design
  • Available as fully functional and synthesizable VHDL or Verilog soft-core
  • Test benches provided