eASIC nextreme




CFAR  eSi-7569

CFAR eSi-7569



  • Single clock cycle processing making it suitable for interfacing with Pipelined FFT cores
  • Parameterized input I/Q sample bit widths (max 32 bits)
  • Generalized Ordered Statistic (GOS) CFAR algorithms
  • Cell Averaging (CA) CFAR algorithms
  • Macro based configuration between asynchronous/synchronous resets
  • Macro based configuration for CFAR algorithm generation
  • AMBA 3 APB slave interface for setting real-time configurable algorithm parameters and sending target detection flags to the embedded processor