OpenRISC 1200 Processor is part of the OR1000 architecture of free, open source RISC processor cores. The OR1200 processor is a 32-bit load and store RISC architecture designed with emphasis on performance,simplicity, low power, scalability and versatility.

Key Features:

• Free 32-bit processor
• Harvard architecture
• Very silicon efficient
• Multiple instantiation possible on eASIC Nextreme Structured ASIC
• Supported by open source software GNU tools
  • Id GNU Compiler
  • As GNU Assembler
  • GDB GNU Debugger
• Additional tools are also available on www.opencores.org

Download Datasheet

You do not have permission to download this file. Please login or register