eASIC wins a place in “top 100 most innovative companies” by Red Herring Inc.
December 7, 2004
(The 100 finalists were chosen from 1,200 entries)
San Jose, California, December 7, 2004 — eASIC® Corporation, a provider of breakthrough Configurable Logic and Structured ASIC products, today announced that the company was awarded “Top 100 Most Innovative Companies” by Red Herring Inc., a media company whose mission is to cover innovation, technology, financing and entrepreneurial activity. The top 100 innovators were selected after a long and rigorous process of evaluating more than 1,200 entries. The Red Herring editorial team has chosen the finalists and the winners will be announced at Red Herring’s Fall Conference in Monterey, California on Dec. 6-8. The results will also be published in Red Herring’s Dec. 13 issue.
This award recognizes eASIC’s breakthrough technology in the area of chip customization for which the company holds 11 broad patents. In today’s nanotechnology environment, the cost of designing and producing ASICs is reaching $20M, making standard ASICs uneconomical for most product applications. Therefore, a critical need for affordable ASICs has emerged, one that optimizes the cost/performance of designing new products. eASIC’s Configurable Logic technology and its fast-turn Structured eASIC products answer these industry requirements with a unique logic fabric, which offers both design flexibility and cost-effective production.
“eASIC has developed a breakthrough semiconductor technology that will have a significant impact on chip developers and product manufacturers,” said Matt Murphy, Principal Partner, Kleiner Perkins Caufield and Byers. “eASIC provides the low upfront cost and fast turnaround time advantages of FPGAs, with density, gate-delay and power consumption similar to those of ASICs. There is a huge opportunity for this technology, given the skyrocketing upfront cost and risk in today’s deep sub-micron era.”
“We’re proud to be included in the Red Herring Top 100 list”, said Zvi Or-Bach, eASIC Founder, President and CEO. “For this achievement, we are grateful for the support of our partners, including the semiconductor division of the #1 contract manufacturer, for the backing from our top tier investor – KPCB, and for the complimenting recognition of a large engineering community who ranked eASIC as #1 Ultimate Product in both technology significance and usability in Logic & Programmable Logic category, in a study conducted by EE Times. Moreover, with the dedication of our team, the company is geared up to offer its NRE-free Configurable Logic products to a market eager for such a solution. The time has come to usher in a new era of ASIC design and manufacturing. eASIC has the powerful disruptive technology to make it happen”.
Innovative Configurable Logic Technology
eASIC has a unique Configurable Logic technology implemented in its Structured eASIC products. The patented architecture consists of SRAM-based logic cells and flip-flops that are interconnected by a segmented wiring grid utilizing upper metal layers. The logic cells programming is done similarly to an FPGA, by loading a bit-stream to program the LUTs (Look-up-Tables) and initialize the flip-flops after powering up the device. The routing and interconnection is done similar to other ASICs, but utilizes just a single via-layer for customization. Thus, a customer design is implemented on the Structured eASIC fabric by using a combination of bit-stream to program the LUTs and a single custom Via-mask for customizing the routing. Moreover, the single mask can be eliminated for prototyping and low-volume by using Direct-write eBeam as maskless lithography. This is made possible because single via-customization is a perfect fit for Direct-write eBeam lithography. Hence, eASIC’s use of maskless lithography removes the customization tooling cost, shortens time-to-market, and adds manufacturing flexibility, allowing eASIC to provide the industry with an NRE-Free customized ASIC devices.
eASIC® has developed a breakthrough Configurable Logic technology aimed at dramatically reducing the overall fabrication cost and time of customized high-performance semiconductor chips. Its Structured eASIC architecture enables rapid and low-cost ASIC and SoC (System-on-Chip) designs by innovative use of proven programmable logic fabric in conjunction with single-via customizable segmented routing. As single-via generates ten times higher throughput of Direct-write e-Beam customization, it enables eASIC to offer NRE-free Structured ASIC. The Structured eASIC technology was successfully proven in silicon and validated by world-class semiconductor vendors. Partnering with industry leaders to jointly develop, manufacture and market Structured ASIC products, the company is positioned to become the preferred Structured ASIC solution.
eASIC Corporation is a privately held company, Venture Capital backed by Kleiner Perkins Caufield and Byers. Headquartered in San-Jose, California, eASIC was founded in 1999 by Zvi Or-Bach, the founder of Chip Express.
Jasbinder (Jazz) Bhoot
Senior Director, Marketing
Tel: (408) 855-3028
Fax: (408) 855-9201
All trademarks mentioned herein are the property of their respective owners.