eASIC nextreme




eSi-3200

eSi-3200



  • 32-bit RISC architecture
  • 16 or 32 general purpose registers
  • 104 basic instructions and 10 addressing modes
  • Supports up to 90 user-defined instructions
  • 5-stage pipeline
  • Harvard or von Neumann memory architecture
  • Optional memory protection unit (MPU)
  • AMBA AXI or AHB data bus and APB peripheral bus
  • Optional support for user and supervisor modes
  • Up to 32 interrupts plus NMI and system call
  • Fast interrupt response time of 6-9 cycles
  • JTAG or serial debug
  • Intermixed 16 and 32-bit instructions result in exceptional code density without compromising performance
  • C and C++ software development using license-free toolchain, under industry standard Eclipse IDE
  • Easy migration path to 16-bit version or 32-bit version with caches