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Nextreme - 90nm New ASIC
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    Affordable, Customizable LEON3 Processor Systems
     
         
     
    LEON3 Processor

    LEON3 is a 32-bit processor core conforming to the IEEE-1754 (SPARC V8) architecture. It is designed for embedded applications, combining high performance with low complexity and low power consumption.

     
     

    LEON3 Key Features

     
    The LEON3 processor has the following features:
  • SPARC V8 instruction set with V8e extensions
  • Advanced 7-stage pipeline
  • Hardware multiply, divide and MAC units
  • High-performance, fully pipelined IEEE-754 FPU
  • Separate instruction and data cache (Harvard architecture) with snooping
  • Configurable caches: 1 - 4 sets, 1 - 256 kbytes/set. Random, LRR or LRU replacement
  • Local instruction and data scratch pad rams
  • SPARC Reference MMU (SRMMU) with configurable TLB
  • AMBA-2.0 AHB bus interface
  • Advanced on-chip debug support with instruction and data trace buffer
  • Symmetric Multi-processor support (SMP)
  • Power-down mode and clock gating
  • Robust and fully synchronous single-edge clock design
  • 235MHz typical performance in Nextreme zero mask-charge ASIC
  • Fault-tolerant and SEU-proof version available for space applications
  • Extensively configurable
  • Large range of software tools: compilers, kernels, simulators and debug monitors

  • Features Implementation
    Performance 235MHz Typical
    Utilization 16,800 eCells
     
    LEON3 Peripherals

    LEON3 is distributed as part of the GRLIB IP library. The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) development. The IP cores are centered on the common on-chip bus, and use a coherent method for simulation and synthesis.

     
     

    The GRLIB library contains the following IP cores:

  • AHB arbiter/multiplexer with plug&play support
  • AHB/APB bridge
  • 8/16/32-bits PROM ans SRAM controller
  • 32-bits PC133 SDRAM controller
  • UART, timer unit, interrupt controller and GPIO port
  • AHB trace buffer
  • 32-bit Initiator/Target PCI interface (FIFO/DMA)
  • PCI trace buffer
  • 10/100 Mbit Ethernet MAC
  • Fully pipelined single- and double-precision IEEE-754 floating-point unit
  • Technology-independent memory and pad wrappers
  •  
    Software
    The software development environment for LEON consists of many open source tools. A package based on a GNU cross-compilation system is available and includes the following tools:
     
  • GNU C/C++ compiler
  • Linker, assembler, archiver etc.
  • Standalone C-library
  • RTEMS real-time kernel with network support
  • Boot-prom utility (mkprom)
  • Remote debugger monitor for gdb
  • GNU debugger with TK front-end
  • DDD graphical user interface for gdb
  •  
    Documentation
    LEON3 Datasheet for Nextreme
     

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