eASIC nextreme




PCI Express x4 Endpoint

PCI Express x4 Endpoint



  • Multiple listings in the PCI-SIG Integrator’s list
  • Low Latency: Less than 11 clock cycles
  • Lanes Supported: x16, x8, x4, x2, x1
  • Optionally Legacy Mode Support
  • Multifunction Support up to 8
  • Multi VC Support up to 8
  • High Performance with Low Latency, Maximum Throughput
  • Multiple Pipelined Memory WR/RD Capability
  • Low Silicon Footprint
  • Highly Parameterized Core supporting both cut-through and store-and-forward schemes
  • Supports operation with 8-bit and 16-bit PIPE interface
  • Implements all optional configuration space and capability structures
  • Configurable Retry buffering scheme for low footprint and latency
  • Supports all power management states L0, L0s, L1, L2 & L3
  • Supports PCI Express Advanced Error Reporting
  • The products support the most advanced features in PCI Express – Power Management,
QoS, Hot-Plug & Hot-Swap, Data Integrity, and Error Handling