
DES Encryption/Decryption
- NIST certified 56 bit DES implementation
- Both encryption and decryption supported
- Encryption and decryption performed in sixteen clock cycles
- No dead cycles for Key loading or mode switching
- High clock speed and low gate count achieved
- Sustained bit rate is 4x clock speed
- Suitable for data security applications
- Fully synchronous design
- Available as fully functional and synthesizable VHDL or Verilog soft-core