eASIC Corporation Announces a Landmark Program Aimed at Ushering in an era of Affordable Silicon Customization
March 18, 2008
First Phase of Program Enables Cost Reduction of Low Density FPGAs
Santa Clara, California, March 18, 2008 – eASIC Corporation, a provider of zero-mask charge ASIC devices, today announced the first phase of a worldwide program that is aimed at ushering in a new era of affordable silicon customization. The first step in this far-reaching program is to assist companies that are hampered by high FPGA unit costs to set more aggressive market pricing for their end products. The initial targets of this FPGA cost reduction program are the low density FPGAs that are primarily used in consumer and multimedia applications.
Silicon customization was once affordable to many, but as the costs of ASIC design, verification and manufacture increased, ASIC became a viable platform for only the privileged few. Hence, the number of ASIC design starts per year has continued to decrease. Despite earlier promises, FPGAs have not been able to fill this gap due to their very high unit cost and high power consumption, said Jasbinder Bhoot, Senior Director of Marketing at eASIC. With the program we announced today, eASIC is poised to bring back an era of mass silicon customization. Leading to many designs per engineer as opposed to many engineers per design.
This cost-reduction program from eASIC has enabled Rumble to develop a low-cost video processing ASIC aimed at the Chinese Consumer market, said Mike Aronson, CEO of Rumble Development. We just could not have achieved this with any of the low-cost FPGA families period.
eASIC’s Nextreme family of zero mask charge and no minimum order ASIC devices provides designers with the low cost benefits of traditional ASIC devices, combined with a rapid design cycle and only a four to five week silicon turnaround time.
Program Overview and Pricing
The cost reduction program requires zero investment in tools. Customers can provide eASIC with eASIC-ready RTL. eASIC’s unique technology allows a four to five week silicon turnaround time. The 1000 unit promotional price for eASICs Nextreme NX750 device is only $14.95 per unit. The NX750 is capable of replacing the XC3S1600E, XC3S1200E, XC3S1000, XC3S1500, XC3S1000, XC3S2000, XC3S4000 and XC3S5000 from Xilinx, and the EP3C16, EP3C25, EP3C40 and EP3C55 from Altera.
eASIC is a fabless semiconductor company offering breakthrough zero mask-charge ASIC chips aimed at dramatically reducing the overall cost and time-to-production of customized semiconductor devices. Low-cost, high-performance and fast-turn ASIC and System-on-Chip designs are enabled through patented technology utilizing Via-layer customizable routing. This innovative fabric allows eASIC to offer ASICs with no mask-charges and no minimum order quantity.
Privately held eASIC Corporation is headquartered in Santa Clara, California. Investors include Khosla Ventures, Kleiner Perkins Caufield and Byers (KPCB), Crescendo Ventures, Evergreen Partners and Advanced Equities Incorporated. For more information, please visit www.eASIC.com
Xilinx is registered trademark of Xilinx Inc. Altera is a registered trademark of Altera Corp. All trademarks are the property of their respective owners.
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