eASIC Enables Nexus Chips to Reduce Power Consumption by 80% Over FPGAs
July 8, 2008
eASIC’s Zero Mask-charge ASIC Devices Enable Nexus Chips to Increase Performance by 2X and Reduce FPGA Power Consumption by 80% for 3D Video Applications
Santa Clara, CA – July 8, 2008- eASIC Corporation, a provider of zero mask-charge ASIC devices, today announced that Nexus Chips, a leading Korean provider of graphics acceleration solutions, has leveraged eASIC’s Nextreme zero mask-charge ASIC in its latest 3D graphics acceleration system. By using eASIC Nextreme, Nexus Chips was able to obtain twice the performance while reducing power consumption by 80% compared to the FPGA that was previously being used.
Nexus Chips leading edge graphic acceleration devices are targeted at 3D gaming applications for cellular phones and mobile instruments. eASIC Nextreme’s fast logic fabric and dedicated memories were ideal for implementing fast video datapaths required in Nexus Chips’ latest acceleration system.
“We are very impressed with the benefits that eASIC Nextreme zero mask-charge ASICs bring us,” said Douglas (Doug-Myoung) Lee, CTO of Nexus Chips. “Our customers simply do not like to see solutions with FPGAs because they are power hungry and lack the performance required for our applications. eASIC’s zero-mask charge, fast turnaround ASICs provide us the flexibility and rapid time-to-market of FPGAs, but with significantly higher performance, lower cost and lower power per device.”
“We see many designers wanting to use our eASIC Nextreme devices because they provide a greener, lower power alternative to FPGAs. eASIC Nextreme devices replace millions of SRAM cells used for interconnect in FPGAs with a single via layer interconnect to dramatically reduce the die size and power consumption,” said Jasbinder Bhoot, eASIC’s Senior Director of Marketing. “Today’s high resolution, high frame-rate video applications demand solutions that excel in both performance and lower power trajectories.”
eASIC is a fabless semiconductor company offering breakthrough zero mask-charge ASIC devices aimed at dramatically reducing the overall cost and time-to-production of customized semiconductor devices. Low-cost, high-performance and fast-turn ASIC and System-on-Chip designs are enabled through patented technology utilizing Via-layer customizable routing. This innovative fabric allows eASIC to offer ASICs with no mask-charges and no minimum order quantity.
Privately held eASIC Corporation is headquartered in Santa Clara, California. Investors include Khosla Ventures, Kleiner Perkins Caufield and Byers (KPCB), Crescendo Ventures, Advanced Equities Incorporated and Evergreen Partners. For more information, please visit www.eASIC.com.