eASIC Introduces 45nm ASIC Value Shuttle™ Program
December 7, 2010
New Value Shuttle™ Delivers 45nm NEW ASIC Prototypes for $45K
Santa Clara, CA – December 7, 2010 – eASIC Corporation, a provider of NEW ASIC devices, today introduced a Value Shuttle™ program that lowers the entry cost for 45nm ASIC designs. The 45nm Value Shuttle™ enables designers to receive forty-five (45) eASIC Nextreme-2 NEW ASIC prototypes for only forty-five thousand dollars ($45K), a small fraction of the cost of competing ASIC solutions. Through reducing the cost, and hence development risk of ASIC design prototypes, the 45nm eASIC Value Shuttle™ enables designers to bring forward the transition point where designs switch from FPGA to ASIC.
In addition to allowing OEMs to quickly cost reduce FPGA designs, the 45nm Value Shuttle™ enables designers to inexpensively and quickly test new markets. Successful product innovations can be ramped to production at a much lower device cost than equivalent logic density FPGAs thereby enabling OEMs to ramp to profitability much sooner.
“We have streamlined our design flow to make transitions from FPGAs to eASIC Nextreme-2 NEW ASICs a simple process,” commented Jasbinder Bhoot, Vice President Marketing at eASIC Corporation. “After a number of successful 45nm designs many of which are in volume production, we are now lowering the cost of customization for 45nm ASICs even further. The eASIC Value Shuttle™ will enable designers to plan their FPGA cost reductions right from design start. This will start to reverse the trend in declining ASIC design starts and will enable customers to use ASICs rather than FPGAs even for moderate volume applications.”
The 45nm Value Shuttle™ is available immediately for all eASIC Nextreme-2 NEW ASIC designs. Typical users are in demanding end applications such as carrier class wireless, and wired infrastructure, medical equipment or many others where FPGAs are too expensive and/power hungry or replacing legacy cell-based ASICs that require additional functionality. $45K covers the cost of 45 NEW ASIC prototypes but does not include software tools and licensing, design services, where applicable, and production. ASIC and FPGA designers are able to quickly convert their designs to eASIC Nextreme-2 using eASIC’s industry proven eTools 8.2 Design Suite. A free 30 day evaluation of the eTools 8.2 Design Suite is available at www.easic.com.
eASIC is a fabless semiconductor company offering breakthrough NEW ASIC devices aimed at dramatically reducing the overall cost and time-to-production of customized semiconductor devices. Low-cost, high-performance and fast-turn ASIC and System-on-Chip designs are enabled through patented technology utilizing Via-layer customizable routing. This innovative fabric allows eASIC to offer a new generation of ASICs with significantly lower up-front costs than traditional ASICs.
Privately held eASIC Corporation is headquartered in Santa Clara, California. Investors include Khosla Ventures, Kleiner Perkins Caufield and Byers (KPCB), Crescendo Ventures, Advanced Equities Incorporated and Evergreen Partners. For more information on eASIC please visit www.eASIC.com