EE times ACE awards committee selected eASIC’s configurable logic product award finalist
February 22, 2005
(Industry experts as well as technology users voted for eASIC’s breakthrough Structured eASIC Technology)
San Jose, California, February 22, 2005 — eASIC® Corporation, a provider of Configurable Logic and Structured ASIC products, today announced that its Configurable Logic product, eASICore was selected as ACE (Annual Creativity in Electronics) Awards finalist by CMP Media’s EE Times. Based on its innovative technology and usability advantages, the eASICore was nominated for Ultimate Product of the Year in the category of Logic and Programmable Logic. In this ACE Awards program, EE Times stated it will recognize the people, companies and products that demonstrated leadership in the electronics industry. The review Committee for the ACE Awards is composed of the leading voices of academia, industry visionaries and Wall Street’s top executives. The honors will be presented at the first annual ACE awards gala on March 9, 2005, as part of the Embedded Systems Conference in San Francisco.
“We are delighted that leading technologists and executives in our industry have chosen eASIC’s product as an ACE Award finalist,” said Zvi Or-Bach, eASIC Founder and CEO. “This recognition is in praise of our breakthrough configurable logic technology that is aimed at providing a viable and affordable electronics design methodology. The industry is experiencing a tremendous increase of interest in innovative solutions such as Structured ASIC that can cope with major deep-submicron design and manufacturing issues. This opens the window of opportunity for new and innovative ASIC designs which were recently in a significant declining trend. The configurable logic and Structured ASIC technologies has been gaining momentum as the existing Standard Cell and FPGA solutions can no longer answer the cost and performance needs of the majority of today’s semiconductor applications. We look forward to serving this market together with our strategic partner, Flextronics Semiconductor”.
Innovative Configurable Logic Technology – Structured eASIC
eASIC has a unique Configurable Logic technology implemented in its Structured eASIC products. The patented architecture consists of SRAM-based logic cells and flip-flops that are interconnected by a segmented wiring grid utilizing upper metal layers. The logic cells programming is done similarly to an FPGA, by loading a bit-stream to program the LUTs (Look-up-Tables) and initialize the flip-flops after powering up the device. The routing and interconnection is performed similar to other ASICs, but utilizes just a single via-layer for customization. Thus, a customer design is implemented on the Structured eASIC fabric by using a combination of bit-stream to program the LUTs and a single custom Via-mask for customizing the routing. Moreover, the single mask can be eliminated for prototyping and low-volume by using Direct-write eBeam. Hence, eASIC’s use of maskless lithography removes the customization tooling cost, shortens time-to-market, and adds manufacturing flexibility, allowing eASIC to provide the industry with an NRE-Free customized ASIC devices with densities, power and performance akin to a standard cell ASIC.
eASIC® has developed a breakthrough Configurable Logic technology aimed at dramatically reducing the overall fabrication cost and time of customized high-performance semiconductor chips. Its Structured eASIC architecture enables rapid and low-cost ASIC and SoC (System-on-Chip) designs by innovative use of proven programmable logic fabric in conjunction with single-via customizable segmented routing. As single-via generates ten times higher throughput of Direct-write e-Beam customization, it enables eASIC to offer NRE-free Structured ASIC. The Structured eASIC technology was successfully proven in silicon and validated by world-class semiconductor vendors. Partnering with industry leaders to jointly develop, manufacture and market Structured ASIC products, the company is positioned to become the preferred Structured ASIC solution.
eASIC Corporation is a privately held company, Venture Capital backed by Kleiner Perkins Caufield and Byers. Headquartered in San-Jose, California, eASIC was founded in 1999 by Zvi Or-Bach, the founder of Chip Express.
Jasbinder (Jazz) Bhoot
Senior Director, Marketing
Tel: (408) 855-3028
Fax: (408) 855-9201
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