eASIC nextreme

Principal SERDES Applications Engineer

Position: Principal SERDES Applications Engineer
Location: Santa Clara, CA, USA
Job ID: E882017

Job Summary / Objective

This position, reporting directly to the Sr. Director, IP & Systems Engineering, will use their knowledge of high-speed SERDES technology to both, lead efforts to and develop collateral, lead and perform protocol characterization, lead and develop characterization boards and provide pre and post sales customer support. The position requires a self-driven candidate with very good knowledge on design and verification as well as good communication skills.

Essential Functions

  • Develop collateral such as handbooks, datasheets
  • Create protocol specific use models
  • Author application notes
  • Perform protocol specific characterization and author characterization reports
  • Work with IP teams and customers to ensure proper usage of the eASIC SERDES for various applications and protocols
  • Define methodology for high speed serial IO measurements
  • Validate PCS and PMA blocks of the transceiver
  • Leading and dotted line managing the characterization team
  • Involved in engaging with key customers to explain current and future SERDES architectures and requirements, gathering requirements for next generation SERDES, and demonstrating technology capability
  • Lead the advanced customer support and design win effort as it relates to SERDES
  • Design/simulate/bring-up characterization and evaluation boards


  • Detail oriented
  • Strong written and verbal communication skills
  • Strong collaboration skills
  • Strong technical skills

Manager / Supervisory Responsibilities

This position has no direct supervisory responsibilities, but does serve as a coach and mentor for other positions in the department and leads projects.


Occasional travel is expected for this position.

Required Education and Experience

  • BSEE required; MSEE preferred
  • Minimum of 12 years of professional experience in a semiconductor industry, in a research and development environment
  • Knowledge of SERDES and protocols such as PCI-Express, 10GBASE-KR/SR/MR/ER/LR, 25GBASE-KR, JESD204x, CPRI/OBSAI, DisplayPort, HDMI, VbyOne etc.
  • Experience with 28G+ SERDES speeds
  • Experience in Verilog/VHDL, C/C++
  • Experience in Perl, Python, and Matlab
  • Hands-on experience with high-bandwidth oscilloscopes, BERTs and associated lab equipment for SERDES characterization
  • Knowledge of basic Communications System Theory as it pertains to SerDes specifically, including PLLs and Timing Recovery (CDR)
  • Exposure to SI concepts, including sources and causes of noise and jitter
  • Self-starter with the ability to manage multiple projects with simultaneous time sensitive deadlines
  • Ability to function independently while maintaining strong team-work and collaborative approach
  • Highly motivated with strong interpersonal skills
  • Strong written and verbal communication skills

EEO Statement

eASIC provides equal employment opportunities (EEO) to all employees and applicants for employment without regard to race, color, religion, sex, national origin, age, disability or genetics. In addition to federal law requirements, eASIC complies with applicable state and local laws governing nondiscrimination in employment in every location in which the company has facilities.

Other Duties

Please note this job description is not designed to cover or contain a comprehensive listing of activities, duties or responsibilities that are required of the employee for this job. Duties, responsibilities and activities may change at any time with or without notice.

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